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REVISIONS LTR DESCRIPTION DATE APPROVED
A
Removed vendor CAGE 61772 as source of supply for case outline letter Z, the F-11A package. Added case outline letters U and T, F-11 and D-15 to the drawing. Editorial changes throughout. Changes in accordance with NOR 5962-R042-95. Updated boilerplate to reflect current requirements. Corrections to pages 4, 5, 8 and timing waveforms. - glg
1990 OCT 04
M. A. Frye
B C
94-12-15 01-01-17
M. A. Frye Raymond Monnin
THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED.
REV SHEET REV SHEET REV STATUS OF SHEETS PMIC N/A C 15 C 16 REV SHEET PREPARED BY Kenneth Rice CHECKED BY Ray Monnin C 1 C 2 C 3 C 4 C 5 C 6 C 7 C 8 C 9 C 10 C 11 C 12 C 13 C 14
DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216
STANDARD MICROCIRCUIT DRAWING
THIS DRAWING IS AVAILABLE FOR USE BY All DEPARTMENTS
APPROVED BY Michael. A. Frye
MICROCIRCUITS, MEMORY, DIGITAL, CMOS, PARALLEL 512 X 9 FIFO, MONOLITHIC SILICON
AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A
DRAWING APPROVAL DATE 23 May 1988 REVISION LEVEL
SIZE
C
A
SHEET
CAGE CODE
67268
1 OF 16
5962-87531
DSCC FORM 2233 APR 97 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.
5962-E172-01
1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN shall be as shown in the following example: 5962-87531 | | | Drawing number 01 | | | Device type (see 1.2.1) X | | | Case outline (see 1.2.2) X | | | Lead finish (see 1.2.3)
1.2.1 Device type(s). The device type(s) shall identify the circuit function as follows: Device type 01 02 03 Generic number 7201 7201 7201 Circuit 512 X 9-bit parallel FIFO 512 X 9-bit parallel FIFO 512 X 9-bit parallel FIFO Access time 30 ns 50 ns 80 ns
1.2.2 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835, and as follows: Outline letter X Y Z U T Descriptive designator GDIP1-T28 or CDIP2-T28 CQCC1-N32 CDFP3-F28 GDFP2-F28 GDIP4-T28 or CDIP3-T28 Terminals 28 32 28 28 28 Package style dual-in-line package rectangular chip carrier flat package flat package dual-in-line package
1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC).................................................. DC output current (IOUT)....................................................... Ambient storage temperature .............................................. Temperature under bias ....................................................... Thermal resistance, junction-to-case ("JC) .......................... Maximum power dissipation (PD):......................................... 1.4 Recommended operating conditions. 1/ Supply voltage range (VCC)................................................... Ground voltage (VSS) ............................................................ Minimum high level input voltage (VIH) ................................. Maximum low level input voltage (VIL) ................................. Case operating temperature range (T C) ............................... Rise time .............................................................................. Fall time................................................................................ +4.5 V dc to +5.5 V dc 0 V dc 2.0 V dc 0.8 V dc -55GC to +125GC 5 ns 5 ns -0.5 V dc to +7.0 V dc 50 mA -65GC to +150GC -55GC to +125GC See MIL-STD-1835 1.0 W 2/
1/ All voltages referenced to V SS. 2/ Must withstand the added PD due to short circuit test; e.g., IOS.
STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000
DSCC FORM 2234 APR 97
SIZE
A
REVISION LEVEL C
5962-87531
SHEET 2
2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation. SPECIFICATION DEPARTMENT OF DEFENSE MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. STANDARDS DEPARTMENT OF DEFENSE MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. HANDBOOKS DEPARTMENT OF DEFENSE MIL-HDBK-103 - List of Standard Microcircuit Drawings (SMD's). MIL-HDBK-780 - Standard Microcircuit Drawings. (Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing shall take precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for nonJAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF38535 may be processed as QML product in accordance with the manufacturer's approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect the PIN as described herein. A "Q" or "QML" certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Die overcoat. Polyimide and silicone coatings are allowable as an overcoat on the die for alpha particle protection provided that each coated microcircuit inspection lot (see MIL-PRF-38535, appendix A) shall be subjected to and pass the Internal Water-Vapor Content test (test method 1018 of MIL-STD-883). The frequency of the internal water vapor testing may not be decreased unless approved by the preparing activity. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range.
STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000
DSCC FORM 2234 APR 97
SIZE
A
REVISION LEVEL C
5962-87531
SHEET 3
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked as listed in MIL-HDBK-103 (see 6.6 herein). For packages where the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. 3.5.1 Certification/compliance mark. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, Appendix A. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturer's product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required in accordance with MIL-PRF-38535, appendix A. 3.9 Verification and review. DSCC, DSCC's agent and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. QUALITY ASSURANCE PROVISIONS 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test (method 1015 of MIL-STD-883). (1) Test condition C or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or procuring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015 of MIL-STD-883. (2) TA = +125GC, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroup 4 (CIN and COUT measurement) shall be measured only for the initial test and after any design or process changes which may affect capacitance. Sample size is 15 devices with no failures, and all input and output terminals tested. d. Subgroups 7 and 8 tests shall include verification of the truth table.
STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000
DSCC FORM 2234 APR 97
SIZE
A
REVISION LEVEL C
5962-87531
SHEET 4
TABLE I. Electrical performance characteristics. | |Symbol | | | | |ILI | | |ILO | | |VOL | | |VOH | | |ICC1 | | | |ICC2 | | | |ICC3 | | | |CI | | | |CO | | | | | | Conditions | -55GC < TC < +125GC | VSS = 0 V | 4.5 V < VCC < 5.5 V | unless otherwise specified | | 0.4 V < VIN < VCC | | | 0.4 V < VOUT < VCC, R > VIH | | VCC = 4.5 V, IOL = 8.0 mA | VIL = 0.8 V, VIH = 2.2 V | | VCC = 4.5 V, IOH = -2.0 mA | VIL = 0.8 V, VIH = 2.2 V | | | f = maximum, outputs open, | VCC = maximum | | | R = W = RS = FL/RT = VIH, | outputs open | | | All inputs = VCC - 0.2 V, | outputs open | | | VI = 5.0 V or GND, f = 1 MHz | TC = +25GC, See 4.3.1c | | | VO = 5.0 V or GND, f = 1 MHz | TC = +25GC, See 4.3.1c | | | See 4.3.1d. | | | |Group A |Device |subgroups | types | | | | | | |1, 2, 3 | All | | | | |1, 2, 3 | All | | | | |1, 2, 3 | All | | | | |1, 2, 3 | All | | | | |1, 2, 3 | All | | | | | | |1, 2, 3 | All | | | | | | |1, 2, 3 | All | | | | | | |4 | All | | | | | | |4 | All | | | | | | |7, 8A, 8B | All | | | | Limits | | | | | Min | Max | | | -10 | 10 | | | | | -10 | 10 | | | | | | 0.4 | | | | | 2.4 | | | | | | | 100 | | | | | | | | 15 | | | | | | | | 900 | | | | | | | |5 | | | | | | | |7 | | | | | | | | | | | | Unit | | | | | 2A | | | 2A | | |V | | |V | | | mA | | | | mA | | | | A | | | | pF | | | | pF | | | | |
Test
Input leakage current
Output leakage current
Output low voltage
Output high voltage
Operating supply current
Standby power supply current
Power down current
Input capacitance 1/
Output capacitance 1/
Functional tests
See footnotes at end of table.
STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000
DSCC FORM 2234 APR 97
SIZE
A
REVISION LEVEL C
5962-87531
SHEET 5
TABLE I. Electrical performance characteristics. Test | |Symbol | | | | |tRC | | |tA | | |tRR | | |tRPW | | |tRLZ 4/ | | |tWLZ 4/ | | |tDV | | |tRHZ 4/ | | |tWC | | |tWPW | | |tWR | | |tDS | | |tDH | | |tRSC | | |tRS | | |tRSR | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conditions 2/ 3/ -55GC < TC < +125GC VSS = 0 V 4.5 V < VCC < 5.5 V unless otherwise specified | | |Group A |Device |subgroups | types | | | | | | 01 |9, 10, 11 | 02 | 03 | | | 01 |9, 10, 11 | 02 | 03 | | | 01 |9, 10, 11 | 02 | 03 | | | 01 |9, 10, 11 | 02 | 03 | | | |9, 10, 11 | All | | | | |9, 10, 11 | All | | | | |9, 10, 11 | All | | | | |9, 10, 11 | 01 | | 02,03 | | 01 |9, 10, 11 | 02 | 03 | | | 01 |9, 10, 11 | 02 | 03 | | | 01 |9, 10, 11 | 02 | 03 | | | 01 |9, 10, 11 | 02 | 03 | | | 01 |9, 10, 11 | 02 | 03 | | | 01 |9, 10, 11 | 02 | 03 | | | 01 |9, 10, 11 | 02 | 03 | | | 01 |9, 10, 11 | 02 | | 03 | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Limits | | | Max | | | | 30 | 50 | 80 | | | | | | | | | | | | | | | | | 20 | 30 | | | | | | | | | | | | | | | | | | | | | | | | | | Unit | | | | | ns | | | ns | | | ns | | | ns | | | ns | | | ns | | | ns | | | ns | | | ns | | | ns | | | ns | | | ns | | | ns | | | ns | | | ns | | | ns |
Read cycle time Access time Read recovery time Read pulse width Read pulse low to data bus at low-Z Write pulse low to data bus at low-Z Data valid from read pulse high Read pulse high to data bus at high-Z Write cycle time Write pulse width Write recovery time Data setup time Data hold time Reset cycle time Reset pulse width Reset recovery time
Min 40 65 100
10 15 20 30 50 80 5 5 5
40 65 100 30 50 80 10 15 20 18 30 40 0 5 10 40 65 100 30 50 80 10 15 20
See footnotes at end of table.
STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000
DSCC FORM 2234 APR 97
SIZE
A
REVISION LEVEL C
5962-87531
SHEET 6
TABLE I. Electrical performance characteristics. Test | |Symbol | | | | |tRSS | | |tRTC | | |tRT | | |tRTR | | |tEFL | | |tREF | | |tRFF | | |tWEF | | |tWFF | | tHFH | tFFH | | |tXOL | | |tXOH | | |tXI | | |tXIR | | |tXIS | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conditions 2/ 3/ -55GC < TC < +125GC VSS = 0 V 4.5 V < VCC < 5.5 V unless otherwise specified | | |Group A |Device |subgroups | types | | | | | | 01 |9, 10, 11 | 02 | 03 | | | 01 |9, 10, 11 | 02 | 03 | | | 01 |9, 10, 11 | 02 | 03 | | | 01 |9, 10, 11 | 02 | | 03 | | 01 |9, 10, 11 | 02 | 03 | | | 01 |9, 10, 11 | 02 | | 03 | | 01 |9, 10, 11 | 02 | | 03 | | 01 |9, 10, 11 | 02 | | 03 | | 01 |9, 10, 11 | 02 | | 03 | | 01 |9, 10, 11 | 02 | | 03 | | 01 |9, 10, 11 | 02 | | 03 | | 01 |9, 10, 11 | 02 | | 03 | | 01 |9, 10, 11 | 02 | 03 | | | |9, 10, 11 | All | | | | |9, 10, 11 | All | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Limits | | Min | Max 30 | 50 | 80 | 40 | 65 | 80 | 30 | 50 | 80 | 10 | 15 | 20 | | 40 | 65 | 100 | 30 | 45 | 60 | 30 | 45 | 60 | 30 | 45 | 60 | 30 | 45 | 60 | 40 | 65 | 100 | 30 | 50 | 80 | 30 | 50 | 80 30 | 50 | 80 | | 10 | | | 15 | | | | Unit | | | | | ns | | | ns | | | ns | | | ns | | | ns | | ns | | | ns | | | ns | | | ns | | | | ns | | | ns | | | ns | | | ns | | | ns | | | ns |
Reset setup time Retransmit cycle time Retransmit pulse width Retransmit recovery time Reset to empty flag low Read low to empty flag low Read high to full flag high Write high to empty flag high Write low to full flag low Reset to half-full and full flag high Read/write to XO low Read/write to XO high XI pulse width XI recovery time XI setup time
1/ This parameter tested initially and after any design or process change which could affect this parameter, and is therefore guaranteed to the limits specified in table I. 2/ For output load circuit and ac test conditions, see figure 3. 3/ For timing waveforms, see figure 4. 4/ May not be tested, but shall be guaranteed to the limits specified in table I.
STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000
DSCC FORM 2234 APR 97
SIZE
A
REVISION LEVEL C
5962-87531
SHEET 7
| Device types | | Case outlines | |Terminal number | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
| All | | X, Z, U, T | Y | | | Terminal symbol | | | |W |D8 |D3 |D2 |D1 |D0 | | XI | | FF |Q0 |Q1 |Q2 | |Q3 |Q8 |GND |R |Q4 |Q5 |Q6 |Q7 | | XO / HF | EF | RS | | FL / RT |D7 |D6 |NC |W |D8 |D3 |D2 |D1 | |D0 | | XI | FF |Q0 |Q1 | |NC |Q2 |Q3 |Q8 |GND |NC |R |Q4 | |Q5 |Q6 |Q7 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |
| XO / HF | | EF | RS | FL / RT |NC |D7 |D6 |D5 |D4 |VCC | | | | | | | | | | |
| 26 |D5 | 27 |D4 | 28 |VCC | 29 |--| 30 |--| 31 |--| 32 |--| | NC = no connection
FIGURE 1. Terminal connections.
STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000
DSCC FORM 2234 APR 97
SIZE
A
REVISION LEVEL C
5962-87531
SHEET 8
Reset and retransmit Single device configuration/width expansion mode
| | | |
Mode
| | | | | RS | | |0 |1 |1 |
Inputs | | RT | | |X |0 |1 | | | XI | | |0 |0 |0 |
| | | |
Internal status | | Write pointer | | | Location zero | Unchanged | Increment 1/ |
| | | |
Outputs | | FF | | |1 |X |X | | | HF | | |1 |X |X |
| | | | | | | | | | |
| | | | Reset | Retransmit | Read/write |
| Read pointer | | | Location zero | Location zero | Increment 1/ |
| EF | | |0 |X |X |
1/ Pointer will increment if flag is high.
Reset and first load Depth expansion/compound expansion mode
| | | | | Mode | | | Reset first device | Reset all other devices | Read/write |
| | | | | RS | | |0 |0 |1 |
Inputs | | FL | | |0 |1 |X | | | XI | | | 1/ | 1/ | 1/ |
| | | |
Internal status | | Write pointer | | | Location zero | Location zero | X |
| | Outputs | | | | EF | | |0 |0 |X | | FF | | |1 |1 |X |
| | | | | | | | | | |
| Read pointer | | | Location zero | Location zero | X |
1/ XI is connected to XO of previous device.
NOTES: RS = Reset input, FL / RT = First load/retransmit, EF = Empty flag output, FF = Full flag output, XI = Expansion input, and HF = Half-full flag output 0 = Low level voltage 1 = High level voltage X = Don't care
FIGURE 2. Truth tables.
STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000
DSCC FORM 2234 APR 97
SIZE
A
REVISION LEVEL C
5962-87531
SHEET 9
NOTE: CL includes scope and jig capacitance.
AC test conditions | | Input pulse levels | Input rise and fall times | Input timing reference levels | Output reference levels | | | GND to 3.0 V | 5 ns | 1.5 V | 1.5 V | | | | | | |
FIGURE 3. Output load circuit and ac test conditions.
STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000
DSCC FORM 2234 APR 97
SIZE
A
REVISION LEVEL C
5962-87531
SHEET 10
FIGURE 4. Timing waveforms.
STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000
DSCC FORM 2234 APR 97
SIZE
A
REVISION LEVEL C
5962-87531
SHEET 11
Notes: 1. EF, FF, and HF may change status during RESET but flags will be valid at tRSC. 2. W and R = VIH around the rising edge of RS.
FIGURE 4. Timing waveforms - continued.
STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000
DSCC FORM 2234 APR 97
SIZE
A
REVISION LEVEL C
5962-87531
SHEET 12
FIGURE 4. Timing waveforms - continued.
STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000
DSCC FORM 2234 APR 97
SIZE
A
REVISION LEVEL C
5962-87531
SHEET 13
Note: EF, FF, and HF may change status during RETRANSMIT but flags will be valid to t RTC.
FIGURE 4. Timing waveforms - continued.
STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000
DSCC FORM 2234 APR 97
SIZE
A
REVISION LEVEL C
5962-87531
SHEET 14
HALF FULL FLAG TIMING HALF FULL OR LESS W t RHF HALF FULL OR LESS
MORE THAN HALF FULL
R
t
WHF
HF
EXPANSION OUT TIMING WRITE TO LAST PHYSICAL W LOCATION READ FROM LAST PHYSICAL LOCATION R t XOL t XOH t t XOL XOH
XO
EXPANSION IN TIMING t XI t XIR
XI
t W
XIS WRITE TO FIRST PHYSICAL LOCATION
t
XIS
READ FROM FIRST PHYSICAL LOCATION
R
FIGURE 4. Timing waveforms - continued.
STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000
DSCC FORM 2234 APR 97
SIZE
A
REVISION LEVEL C
5962-87531
SHEET 15
4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition C or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or procuring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of MIL-STD-883. (2) TA = +125GC, minimum. (3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. TABLE II. Electrical test requirements. * MIL-STD-883 test requirements Interim electrical parameters (method 5004) Final electrical test parameters (method 5004) Group A test requirements (method 5005) Groups C and D end-point electrical parameters (method 5005) * Indicates PDA applies to subgroups 1 and 7. ** See 4.3.1c. 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535, appendix A. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for government microcircuit applications (original equipment), design applications, and logistics purposes. 6.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractorprepared specification or drawing. 6.3 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.4 Record of users. Military and industrial users should inform Defense Supply Center Columbus when a system application requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0525. 6.5 Comments. Comments on this drawing should be directed to DSCC-VA, Columbus, Ohio 43216-5000, or telephone 614692-0674. 6.6 Approved source of supply. An approved source of supply is listed herein. Additional sources will be added as they become available. The vendor listed herein has agreed to this drawing and a certificate of compliance (see 3.6 herein ) has been submitted to DSCC-VA. Subgroups (per method 5005, table I) 1 1*, 2, 3, 7*, 8, 9, 10, 11 1, 2, 3, 4**, 7, 8, 9, 10, 11 1, 2, 3, 7, 8A, 8B
STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000
DSCC FORM 2234 APR 97
SIZE
A
REVISION LEVEL C
5962-87531
SHEET 16
STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 01-01-17 Approved sources of supply for SMD 5962-87531 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DSCC-VA. This bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. Standard microcircuit 1/ drawing PIN 5962-8753101XA 5962-8753101YA 5962-8753101ZA 5962-8753101UA 5962-8753101TA 5962-8753102XA 5962-8753102YA 5962-8753102ZA 5962-8753102UA 5962-8753102TA 5962-8753103XA 5962-8753103YA 5962-8753103ZA 5962-8753103UA 5962-8753103TA Vendor CAGE number 61772 61772 3/ 61772 61772 61772 61772 3/ 61772 61772 61772 61772 3/ 61772 61772 Vendor similar PIN 2/ IDT7201LA30DB IDT7201LA30XB IDT7201LA30XB IDT7201LA30XEB IDT7201LA30TCB IDT7201LA50DB IDT7201LA50XB IDT7201LA50XB IDT7201LA50XEB IDT7201LA50TCB IDT7201LA80DB IDT7201LA80XB IDT7201LA80XB IDT7201LA80XEB IDT7201LA80TCB
1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed contact the Vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. 3/ No longer available from an approved source. Vendor CAGE number 61772 Vendor name and address Integrated Device Technology, Incorporated 2975 Stender Way Santa Clara, CA 95054
The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin.

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